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Static Simulator: Download

Academic Non-commercial License

Academic users (e.g., educational institutions, U.S. government research labs, and non-profit research institutes) may use the UCR Digital Microfluidic Static Synthesis Simulator (UCR DMFBSSS), as well as modify and add to its source code free-of-charge for non-commercial research and instruction. Support is not provided except as our time happens to permit.

Any use of the UCR DMFBSSS software, in binary or source form, in a commercial setting or application (e.g., use within a for-profit business, use to generate intellectual property for patents, or use to implement a consulting contract) for any reason, purpose or goal is considered commercial use of the UCR DMFBSSS software and thus requires explicit permission and licensing from the original authors. Please contact microfluidics@cs.ucr.edu if you would like to receive more information about using the UCR DMFBSSS commercially.

We encourage the academic users above to use, add to and improve upon the UCR DMFBSSS and hope that it will be a valuable learning and research tool for the digital microfluidics research community.

Download

By downloading and using the UCR DMFBSSS software, you are agreeing to the licensing agreement described above and in this document.

The source code is available at the following GitHub repository.

Reference

The UCR Digital Microfluidic Biochip (DMFB) Static Simulator has been described in detail in the following two papers. We respectfully request that you cite both of these papers if you use our binaries or source code in your own work.

D. Grissom, C. Curtis, S. Windh, C. Phung, N. Kumar, Z. Zimmerman, K. O'Neal, J. McDaniel, N. Liao, and P. Brisk
An Open-source Compiler and PCB Synthesis Tool for Digital Microfluidic Biochips
Integration: The VLSI Journal
51:169-193, September, 2015
Paper

D. Grissom, K. O'Neal, B. Preciado, H. Patel, R. Doherty, N. Liao, and P. Brisk
A Digital Microfluidic Biochip Synthesis Framework
20th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Santa Cruz, CA, USA, October 7-12, 2012 pp. 177-182
Paper    Slides

The VLSI-SoC 2012 paper described a preliminary version of the framework with fewer algorithms and more limited capabilities. If you are space constrained and can only fit one reference, we prefer that you reference the Integration paper.

Contact

Please direct any questions, comments, or other inquiries to the following e-mail address: microfluidics@cs.ucr.edu

Acknowledgment

This material is based upon work supported by the National Science Foundation under Grant Numbers 1035603, 1536026, and 1545097. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.